The present invention relates to a method of performing process window compliant corrections of design layout.
During the optical lithography step in integrated circuit fabrication, a device structure is patterned by imaging a mask onto a radiation sensitive film (photoresist or resist) overcoating different thin film materials on the wafer. These photoresist films capture the pattern deliniated through initial exposure to radiation and allow subsequent pattern transfer to the underlying layers. The radiation source, imaging optics, mask type and resist performance determine the minimum feature size that can be reproduced by the lithography process. Imaging of mask patterns with critical dimensions smaller than the exposure wavelength results in distorted images of the original layout pattern, primarily because of optical proximity effects of the imaging optics. Nonlinear response of the photoresist to variability in exposure tool and mask manufacturing process as well as variability in resist and thin film processes also contribute to image distortion. These distortions include variations in the line-widths of identically drawn features in dense and isolated environments (iso-dense bias), line-end pullback or line-end shortening from drawn positions and corner rounding. The process of correcting these types of distortions is called optical proximity correction or optical and process correction (OPC). OPC is a procedure of pre-distorting the mask layout by using simple shape manipulation rules (rulebased OPC) or fragmenting the original polygon into line segments and moving these segments to favorable positions as determined by a process model (model-based OPC). OPCed mask improves image fidelity on a wafer.
Current model-based OPC use the original layout as a target to do OPC corrections. While this approach corrects for image distortions at best process conditions to achieve target critical dimensions, this approach does not guarantee that the target critical dimensions will meet process window requirements. Process window requirements are requirements that the critical dimension is maintained to within a predetermined range (e.g., +/−10% from nominal critical dimension) if the resist image plane is varied within a given range centered about the focal plane (e.g., +/−0.2 μm out of focus (0.4 μm Depth Of Focus or DOF)), and/or the exposure energy is off target by a certain percent (e.g., +/−2.5% of nominal exposure energy (5% Exposure Latitude or EL)). Ensuring that process window requirements are met guarantees manufacturability of the photolithography step.
Currently, there is one known existing solution to this problem which is the addition of subresolution assist features (SRAF) to main features and model-based OPC is applied to improve process window, see, for example, U.S. Pat. No. 6,472,108. This one known solution, however, has a number of disadvantages associated therewith, which include the following:                1. Extrapolation of one-dimensional SRAF rules to two-dimensional circuit layouts presents a problem for which no exact solution exists within the bounds of manufacturability;        2. Discontinuous process window enhancement occurs because of the discrete nature of SRAF;        3. The mask is more difficult to manufacture since sub-design rule features have to be on the mask;        4. The write time of the mask is increased resulting in increasing the cost of the mask;        5. The mask has a higher probability for defects because of the increase in polygon count;        6. SRAF applications to arbitrary two-dimensional layout patterns is prone to corner printing; and        7. Corrected layout of SRAF with model-based OPC is more complex than model-based OPC without SRAF.        
Therefore, an improved method of performing process window compliant corrections of a design layout is needed. The present invention provides such a method of performing process window compliant corrections of a design layout. Features and advantages of the present invention will become apparent upon a reading of the attached specification, in combination with a study of the drawings.